Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, designing and conducting experiments/tool evaluations. This candidate will also contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping other specialists on projects, detailing work through documentation, working with EDA vendors and propagating DFT methodologies.